At-Spex LMO Test Systems, Inc.
   ...featuring the At-Spex 768
   our 768 Channel, 100/200MHz Production-worthy IC ATE System

Patent Pending Dual Pin Architechture: 768 'FAST PINS' integrated with our proven 384 I/O Precision AC/DC Pins

Welcome.

At-Spex LMO designs, manufactures, sells and supports IC automated test equipment
(ATE) aimed at the midrange of the high performance market.

Test Development Applications Packages AppsPaks™ include FPGA's, Flash, DDR's, Ethernet MAC/PHY and ADC's.

Our new 4th generation VLSI Production IC Test System provides up to 267 MHz Digital Vector Rate -768 Tester Channels -100Meg Vector Pattern Depth at an unprecedented $100,000 price tag
Click to view our new FAST PINS test head

New Applications Note February 2013: 1020 pin SoC Step-By-Step Test Development and Debug

FAST PEG Pin Electonics Gate Array PEC (Pin Electronics Card) top		FAST PEG PEC bottom		FAST PEG PEC Stack-up		Data Eye preserved to 200MHz to the DUT Please Zoom PDF to greater than 150% to observe 200MHz Vector Data Rate

FPGA 432 Pin BGA Test Program and DUT Card	Precision System Level Timing and Clock Distribution
High Res Image of DUT Card and test socket Test Program Files	Seamless integration of 1 GHz bipolar timing generators/deskew with 500 MHz CMOS Digital Clock Management DCM's via differential signaling, multi-level I/O

400MHz Clocks	Actual 1000 Pin Altera SoC Example
Frequency: Programmable from 125 KHz to 400MHz in 125 KHz steps. Pulse Train:    Programmable from 1 to 2**32 (4 billion) pulses per trigger. Pulse Width:    Square wave mode, or programmable 2 ns to 12 ns with 50ps resolution Drive Levels:   Programmable -2 V to + 6 V Slew Rate:       Programmable 1 V to 2.5 V per ns. Modes:            Burst, Infinite (Continuious). Shown here is the classic 0 to 3 V, 5-4-3-2-1Blast-off of min pulse width (overlayed). Note the 1ns minimum pulse width only makes it to 1.5V.	1000+ Pin Dual-Clock Domain Example At-Speed AC Functional Waveforms Simulated vs. Datasheet Timing Diagram with Test Bench State Machine Bubble Diagrams

Up to 768 Pins and 267 MHz Vector Rate At-Spex is the only portable performance benchtop, 17 inches cubed and approximatly 100 pounds- custom shipping crate bottom half shown	FAST PINS Plug-on Test Head which consists of 4 PEG Cards (Pin Electronics Gate Array)- 1 of 4 shown in upper left quadrant. Each PEG is 192 tester channels. The PEG's in turn plug into the SBC Motherboard which has a Pentium Mobile SBC, HAPS (High Amperage User Programmable Power Supplies)
1020 pin DUT Card ultra-high resolution pic
VPU Vector Processing Unit VLSI u-Instructions - Match, Branch-on-fail, Repeats, Sub-routines, Jumps	DUT Card for Dual Clock Domain, Mixed-Signal 33 MHz PCI Ethernet Controller MAC with 125MHz Embedded PHY.  Here the DUT is 128 pins of the testers 768 channels.  Note the traces are all from PEG 1 ( 192 channels) and are matched lengths
WinChar Windows Characterization GUI	FPGA test development and temperature test methodology
SHMOO Plot	Top PCB 3D Print
Bottom PCB 3D Print
1020 Pin DUT Card Top	1020 Pin DUT Card Bottom

400 MHZ CLKGEN		400 MHz Edge 693 CLK Driver		Universal DIP DUT Card

The LMO 500 provides production IEEE 1149.1 JTAG programming, testing and engineering characterization for digital and mixed signal semiconductor devices.

In addition to the FAST and Precision Pins, also provides test program control of auxiliary test head connections. These can include IEEE-488/GPIB instrumentation, VXI modules, even in-house hardware designs. Auxiliaries are seamlessly incorporated into the system by TCOMM and function as an integral part of the tester, allowing the system to efficiently and accurately address mixed signal devices and systems. Mixed Signal Applications Test Plan for RDC

One of our recent applications development efforts (Q1/09) is integrating TI's world-class ADC Dynamic Measurement module

Coherent Sampling	Up to 500 MegaSamples/sec	1.118 MHz sine 800 mV PP, 25.000 MHz sampling clk
DUT Card (Green) co-axial interface to the embedded TI ADC Dynamic Measurement Hardware		FAST PINS plug-in Test Head

Test Plan STE10/100A PCI 10/100 ETHERNET CONTROLLER WITH INTEGRATED PHY (3.3V) .DOC / PDF
Transceiver Test Vector Developement_Rev Application Notes DOC / PDF

User Interface

Summary

The AtSpex 768-200 FAST PINS module architecture adds unprecedented small system capability in the following areas: At-Speed AC Functional Test Rate across all channels, Vector Depth, increased Pin Count, Hi Current User Power Supplies for fmax testing as well as preserving the original features of the acclaimed LMO500’s AC/DC Precision Pins

• Speed.  True 100/200/400 MHz programmable vector rate
• 80 ps edge resolution
• Data Eye preserved to 200MHz to the DUT "
• 400MHz Asyncronous Clock

• Deep.  Up to 128M vector pattern depth

• Wide.  768 tester channels

• Hi-Current User Supplies necessary for fmax AC functional

• Four (4) Programmable DUT DPS w/ Programmable Current Limiting: 10A capability 0-5V

• Reconfigurable.  User-selectable ASIC I/O pin levels: all 3.3V, 2.5V, 1.8V, 1.5V 1.2V single-ended and differential standards 

• Integrates the LMO500’s Standard 384 Precision AC/DC Pins w/ FAST’s 768 channels delivered thru 1:2 transparent ASM (Analog Switch Module)

• AC parametrics: 10 ps resolution, 100 ps Driver/Comparator edge placement accuracy; DC parametrics: 12 bit resolution, 1/4LBS max linearity error- calibrated to NIST-traceable 5 ½ digit DVM;

• Hi-throughput: Mainframe-competitive AC and DC parametric  test times ex. 100 pin DUT w/ 25,000 vectors containing 4,000 transitions- 4 sec total to measure and datalog to a file.  Time search algorithm averages 11 iterations to acquire an edge to 10 ps res

• User tools: IEEE 1149 JTAG SCAN Programming Module, MS Windows user interface, Windows WinCHARacterization per-pin digitizing scope, per-pin Curve tracer; Self-test auto-verifies and datalogs all channels for functional Drive/Compare and AC/DC source and measure

• And of course, small. - not only the world’s only known 100MHz benchtop IC tester, the only 200/400.  Approx 600W at 120V, auto-cooling fans to 37 degrees C 

• Microprogrammable FPGA-based tester hardware now includes the vector processor unit (VPU), pin formatters, error logic and pipelines and DUT I/O.  ATSpex IP includes Ethernet PCI DMA Controller; 267 MHz 533 MB/s 1GB DDR2 DIMM Vector Memory Controller; 200 MHz Test Controller Gate Array PEG

• Quick.  Deep Vector Loads accomplished w/ Broadband to the Test Head.  100,000 vectors across 200 signal pins loads in under ½ sec; Ethernet DMA PCI Controller streams at 100Mb/sec

• Cool Only known mainframe-comparable, performance benchtop IC tester.  Approx 15 inches cubed and 600W at 120V, auto-cooling fans to 37 degrees C.  Previous 200MHz CMOS architectures were 4 square meters and 16,000 W.  FAST PCB is 17” x14”, 23 layer Test Head

• Like a space satellite whose entire mission needs to be changed in mid-flight, the Pin Electronics Gate Array is reconfigurable via the test program loading a new image file ex’s. testing all the ASIC I/O standards a device is cable of,

• Modern enabling technologies: 65 nm 1148 pin flip-chip fBGA FPGA’s w/ state of the art clock management DCMtm/DLL’s; 400/533 MB/s DDR2 PC4300 DIMMs; GB test file transfer via Gigabit Ethernet; Embedded Pentium 4 class SBC w/ dual boot Linux and XP Pro

tm trademark of Xilinx

This document describes the design architecture performance specifications of the Model 768-200, and is subject to change without notice.

To be sure that you have the most recent revision of this specification, please contact AtSpex LMO Sales at (509) 939-7916